1. Field of the Invention
The present invention relates to a multiplication method and a multiplication circuit for executing fixed point multiplication instructions used for digital signal processing in image and sound processing fields.
2. Prior Art
FIG. 9 is a conceptual view showing a multiplication method in a multiplication instruction provided with a conventional rounding function.
This conventional multiplication method is carried out as described below. After a multiplication result 903 obtained by the multiplication of a multiplier 901 and a multiplicand 902 is rounded by adding 1 as a rounding signal 906 at a predetermined rounding position 905 where rounding is executed, a bit range 908 up to the rounding position 905 is discarded. The result thus obtained is taken as a multiplication result 907 subjected to rounding.
In the conventional example shown in FIG. 9, however, when multiplication requiring rounding is executed, 1 is added at the predetermined position 905 without exception regardless of how the multiplication result 907 is used in a subsequent process. In this case, the bit range 908 up to the predetermined rounding position 905 becomes meaningless as a multiplication result. When it is assumed that the m-th bit from the least significant bit of the multiplication result 903 is the predetermined rounding position, a bit range capable of being cut out as the multiplication result 907 subjected to rounding is limited to a high-order bit portion having its least significant bit at the (m+1)th bit from the least significant bit of the multiplication result 903.
Therefore, when the decimal point positions of a multiplier and a multiplicand are changeable for example, and when only the integer bits are desired to be cut out after the fraction portion of the multiplication result obtained by the multiplication of the multiplier and the multiplicand is rounded, the decimal point position of the multiplication result obtained by the multiplication changes depending on the decimal point positions of the multiplier and the multiplicand. For this reason, the user trying to execute a multiplication instruction must execute a shift operation for the multiplier or the multiplicand beforehand so that the predetermined rounding position 905 is located at a position suited for rounding the fraction portion (refer to Japanese Laid-open Patent Application No. 5-224888, for example). Alternatively, the user must execute multiplication first without rounding, and then round the fraction portion of the multiplication result.
As described above, in the conventional multiplication method, the user trying to execute a multiplication instruction must shift the multiplier or the multiplicand beforehand so that the predetermined rounding position 905 is located at a suitable rounding position in order that the multiplication result 907 subjected to rounding has a bit range desired to be cut out. Alternatively, the user must execute multiplication first without rounding, and then execute rounding by addition or the like depending on the bit range desired to be cut out from the multiplication result. This causes a problem of increasing the amount of processing.